Metal-insulator-metal (MIM) capacitors have been widely used in functional circuits such as mixed-signal circuits, analog circuits, radio frequency (RF) circuits, dynamic random access memories (DRAM), embedded DRAM, and logic operation circuits. Conventional MIM capacitors were formed in interconnect structures. Since the interconnect structures include copper lines and copper vias formed of damascene processes, the formation of conventional MIM capacitors were integrated with the damascene processes. For example, a bottom electrode of a MIM capacitor may be formed in one of metal layers in the interconnect structure, while the top electrode of the MIM capacitor may be formed between two metal layers.
The conventional MIM capacitor formation processes suffer from drawbacks. The commonly used capacitor-insulator materials such as silicon oxide and silicon nitride react with copper. Since the insulator layers of the MIM capacitors are thin, their thicknesses need to be accurately controlled. Accordingly, the reaction between copper and the insulators may significantly affect the thickness and the quality of the insulators, and in turn cause the degradation of the capacitance and the reliability of the MIM capacitors. Additional process steps and layers are thus needed to prevent such reaction. The manufacturing cost is thus increased. Further, the formation of MIM capacitors results in additional parasitic capacitance, particular for MIM capacitors formed in low-level metal layers, in which the densities of metal lines are high.